From d9663547a1f4337e1a31d727abe15a8aafa0c9c8 Mon Sep 17 00:00:00 2001
From: 3gg <3gg@shellblade.net>
Date: Sat, 8 Feb 2025 14:03:10 -0800
Subject: Initial commit.

---
 src/boot.s   | 44 ++++++++++++++++++++++++++++++++++++++++++++
 src/kernel.c |  4 ++++
 src/link.ld  | 20 ++++++++++++++++++++
 3 files changed, 68 insertions(+)
 create mode 100644 src/boot.s
 create mode 100644 src/kernel.c
 create mode 100644 src/link.ld

(limited to 'src')

diff --git a/src/boot.s b/src/boot.s
new file mode 100644
index 0000000..7baa463
--- /dev/null
+++ b/src/boot.s
@@ -0,0 +1,44 @@
+/*
+References:
+ https://wiki.osdev.org/Raspberry_Pi_Bare_Bones
+ https://jsandler18.github.io/tutorial/boot.html
+ https://jsandler18.github.io/explanations/boot_S.html
+ https://www.rpi4os.com/part1-bootstrapping/
+ https://developer.arm.com/documentation/102422/0100/Example-solutions/System-control-solution
+ https://developer.arm.com/documentation/102422/0100/GAS-syntax-reference?lang=en
+*/
+
+.section ".text.boot"
+
+.global _start
+
+_start:
+  // Let core 0.0.0.0 be the only one running for now. The other cores halt.
+  // Each core has a unique affinity number: <aff3>.<aff2>.<aff1>.<aff0>.
+  // On AArch64, Aff3 takes bits 39-32. The code below copies bits 39-32 over
+  // to 31-24 so that we get a 32-bit value <aff3>.<aff2>.<aff1>.<aff0>.
+  mrs   x0, MPIDR_EL1
+  ubfx  x1, x0, #32, #8 // x1[0..7] = Aff3; x[8..63] = 0
+  bfi   w0, w1, #24, #8 // w0[31..24] = Aff3
+  cbnz  w0, halt        // All cores except 0.0.0.0 halt.
+
+core0:
+  // Initialize the stack. The stack will grow below this boot code.
+  ldr x1, =_start
+  mov sp, x1
+  
+  // Zero-initialize the BSS section.
+  ldr x1, =__bss_start   // Start address of BSS section.
+  ldr x2, =__bss_size    // Size of the BSS section.
+bss_init_loop:
+  str  xzr, [x1], #8     // Store 64-bit 0 to addr; increment addr by 8 bytes.
+  sub  x2, x2, #8        // Decrement remaining size.
+  cbnz x2, bss_init_loop // Loop back if remaining size is non-zero (>0).
+
+  // Jump to C main()
+  bl main
+
+halt:
+  wfi    // Wait for interrupt. Core enters low-power state.
+  b halt // Loop back.
+
diff --git a/src/kernel.c b/src/kernel.c
new file mode 100644
index 0000000..eb7d832
--- /dev/null
+++ b/src/kernel.c
@@ -0,0 +1,4 @@
+void main() {
+  while (1);
+}
+
diff --git a/src/link.ld b/src/link.ld
new file mode 100644
index 0000000..f1d1730
--- /dev/null
+++ b/src/link.ld
@@ -0,0 +1,20 @@
+SECTIONS
+{
+    . = 0x80000;     /* Kernel load address for AArch64 */
+    .text (READONLY) : { KEEP(*(.text.boot)) *(.text .text.* .gnu.linkonce.t*) }
+    .rodata (READONLY) : { *(.rodata .rodata.* .gnu.linkonce.r*) }
+    PROVIDE(_data = .);
+    .data : { *(.data .data.* .gnu.linkonce.d*) }
+    .bss (NOLOAD) : {
+        . = ALIGN(16);
+        __bss_start = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        __bss_end = .;
+    }
+    _end = .;
+
+   /DISCARD/ : { *(.comment) *(.gnu*) *(.note*) *(.eh_frame*) }
+}
+__bss_size = (__bss_end - __bss_start);
+
-- 
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